Skip to content
Snippets Groups Projects
Select Git revision
  • b56b6640e6aab7d35e670acafbcc6e03f7a07bd8
  • experimental default protected
  • v2023.2.5-ffs
  • nrb/ex400-remove-wps
  • nrb/airmax-test
  • v2023.2.4-ffs
  • nrb/ar9344-reset-sequence
  • autinerd/experimental-openwrt-24.10
  • v2023.2.3-ffs
  • v2023.2.2-ffs
  • v2023.2-ffs
  • v2023.1-ffs
  • v2022.1.4-ffs
  • feature/addMikrotikwAP
  • v2022.1.3-ffs
  • v2021.1.2-ffs
  • v2022.1.1-ffs
  • master protected
  • v2021.1.1-ffs
  • nrb/gluon-master-cpe510
  • v2021.1-ffs
  • experimental-2025-07-17
  • experimental-2025-07-17-base
  • experimental-2025-07-12
  • experimental-2025-07-12-base
  • experimental-2025-07-04
  • experimental-2025-07-04-base
  • experimental-2025-07-01
  • experimental-2025-07-01-base
  • experimental-2025-06-25
  • experimental-2025-06-25-base
  • experimental-2025-06-24
  • experimental-2025-06-24-base
  • experimental-2025-06-22
  • experimental-2025-06-22-base
  • v2023.2.5-ffs0.1
  • experimental-2025-06-08
  • experimental-2025-06-08-base
  • experimental-2025-06-06
  • experimental-2025-06-06-base
  • experimental-2025-05-27
41 results

0038-ar71xx-fold-patch-622-MIPS-ath79-add-support-for-QCA956x-ethernet.patch-into-files.patch

Blame
  • 0038-ar71xx-fold-patch-622-MIPS-ath79-add-support-for-QCA956x-ethernet.patch-into-files.patch 4.89 KiB
    From: Matthias Schiffer <mschiffer@universe-factory.net>
    Date: Fri, 13 May 2016 21:00:16 +0200
    Subject: ar71xx: fold patch 622-MIPS-ath79-add-support-for-QCA956x-ethernet.patch into files/
    
    Signed-off-by: Felix Fietkau <nbd@openwrt.org>
    
    Backport of OpenWrt r48650
    
    diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
    index 31d2438..2efb9c7 100644
    --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
    +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
    @@ -198,7 +198,6 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
     	case ATH79_SOC_AR9330:
     	case ATH79_SOC_AR9331:
     	case ATH79_SOC_QCA9533:
    -	case ATH79_SOC_QCA9561:
     	case ATH79_SOC_TP9343:
     		mdio_dev = &ath79_mdio1_device;
     		mdio_data = &ath79_mdio1_data;
    @@ -209,6 +208,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
     	case ATH79_SOC_AR9344:
     	case ATH79_SOC_QCA9556:
     	case ATH79_SOC_QCA9558:
    +	case ATH79_SOC_QCA956X:
     		if (id == 0) {
     			mdio_dev = &ath79_mdio0_device;
     			mdio_data = &ath79_mdio0_data;
    @@ -258,7 +258,6 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
     		break;
     
     	case ATH79_SOC_QCA9533:
    -	case ATH79_SOC_QCA9561:
     	case ATH79_SOC_TP9343:
     		mdio_data->builtin_switch = 1;
     		break;
    @@ -268,6 +267,11 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
     		mdio_data->is_ar934x = 1;
     		break;
     
    +	case ATH79_SOC_QCA956X:
    +		if (id == 1)
    +			mdio_data->builtin_switch = 1;
    +		break;
    +
     	default:
     		break;
     	}
    @@ -387,6 +391,16 @@ static void qca955x_set_speed_sgmii(int speed)
     	iounmap(base);
     }
     
    +static void qca956x_set_speed_sgmii(int speed)
    +{
    +	void __iomem *base;
    +	u32 val = ath79_get_eth_pll(0, speed);
    +
    +	base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
    +	__raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG);
    +	iounmap(base);
    +}
    +
     static void ath79_set_speed_dummy(int speed)
     {
     }
    @@ -517,6 +531,10 @@ struct ag71xx_switch_platform_data ath79_switch_data;
     #define AR934X_PLL_VAL_100	0x00000101
     #define AR934X_PLL_VAL_10	0x00001616
     
    +#define QCA956X_PLL_VAL_1000	0x03000000