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Commit e164bac8 authored by Matthias Schiffer's avatar Matthias Schiffer
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with 928 additions and 4725 deletions
From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 24 Mar 2013 19:23:47 +0000
Subject: ar71xx: fix USB power GPIO on the TL-WDR3500
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36119 3c298f89-4303-0410-b956-a3cf2f4a3e73
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
index 785b21f..5020ba4 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
@@ -37,7 +37,7 @@
#define WDR3500_GPIO_BTN_WPS 16
#define WDR3500_GPIO_BTN_RFKILL 17
-#define WDR3500_GPIO_USB_POWER 22
+#define WDR3500_GPIO_USB_POWER 12
#define WDR3500_KEYS_POLL_INTERVAL 20 /* msecs */
#define WDR3500_KEYS_DEBOUNCE_INTERVAL (3 * WDR3500_KEYS_POLL_INTERVAL)
From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 24 Mar 2013 21:07:21 +0000
Subject: ar71xx: add default LED configuration for the WL-WRD3500
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36120 3c298f89-4303-0410-b956-a3cf2f4a3e73
Conflicts:
target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/leds b/target/linux/ar71xx/base-files/etc/uci-defaults/leds
index 7be4ce9..48b8154 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/leds
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/leds
@@ -126,6 +126,11 @@ tl-wa901nd-v2)
ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
;;
+tl-wdr3500)
+ ucidef_set_led_usbdev "usb" "USB" "tp-link:green:usb" "1-1"
+ ucidef_set_led_wlan "wlan2g" "WLAN2G" "tp-link:green:wlan2g" "phy0tpt"
+ ;;
+
tl-wdr4300)
ucidef_set_led_usbdev "usb1" "USB1" "tp-link:green:usb1" "1-1.1"
ucidef_set_led_usbdev "usb2" "USB2" "tp-link:green:usb2" "1-1.2"
From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Mon, 25 Mar 2013 06:40:03 +0000
Subject: ar71xx: fix ethernet LEDs on the TL-WDR3500
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36122 3c298f89-4303-0410-b956-a3cf2f4a3e73
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
index 5020ba4..452c20b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c
@@ -33,6 +33,11 @@
#define WDR3500_GPIO_LED_WLAN2G 13
#define WDR3500_GPIO_LED_SYSTEM 14
#define WDR3500_GPIO_LED_QSS 15
+#define WDR3500_GPIO_LED_WAN 18
+#define WDR3500_GPIO_LED_LAN1 19
+#define WDR3500_GPIO_LED_LAN2 20
+#define WDR3500_GPIO_LED_LAN3 21
+#define WDR3500_GPIO_LED_LAN4 22
#define WDR3500_GPIO_BTN_WPS 16
#define WDR3500_GPIO_BTN_RFKILL 17
@@ -146,6 +151,17 @@ static void __init wdr3500_setup(void)
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
+
+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1,
+ AR934X_GPIO_OUT_LED_LINK3);
+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2,
+ AR934X_GPIO_OUT_LED_LINK2);
+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3,
+ AR934X_GPIO_OUT_LED_LINK1);
+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4,
+ AR934X_GPIO_OUT_LED_LINK0);
+ ath79_gpio_output_select(WDR3500_GPIO_LED_WAN,
+ AR934X_GPIO_OUT_LED_LINK4);
}
MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500",
From: juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Mon, 25 Mar 2013 06:40:00 +0000
Subject: ar71xx: add GPIO output select values for AR934x
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36121 3c298f89-4303-0410-b956-a3cf2f4a3e73
Conflicts:
target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch
diff --git a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch
index 8411d58..12522c1 100644
--- a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch
+++ b/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch
@@ -166,7 +166,7 @@
#define AR934X_GPIO_REG_FUNC 0x6c
#define AR71XX_GPIO_COUNT 16
-@@ -550,4 +618,139 @@
+@@ -550,4 +618,144 @@
#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
@@ -237,7 +237,12 @@
+#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2)
+#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1)
+
-+#define AR934X_GPIO_OUT_GPIO 0x00
++#define AR934X_GPIO_OUT_GPIO 0
++#define AR934X_GPIO_OUT_LED_LINK0 41
++#define AR934X_GPIO_OUT_LED_LINK1 42
++#define AR934X_GPIO_OUT_LED_LINK2 43
++#define AR934X_GPIO_OUT_LED_LINK3 44
++#define AR934X_GPIO_OUT_LED_LINK4 45
+
+/*
+ * MII_CTRL block
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sat, 29 Mar 2014 21:55:41 +0100
Subject: ar71xx: add support for QCA953x SoC
diff --git a/target/linux/ar71xx/config-3.3 b/target/linux/ar71xx/config-3.3
index dfc5bf2..1c3ba3c 100644
--- a/target/linux/ar71xx/config-3.3
+++ b/target/linux/ar71xx/config-3.3
@@ -40,11 +40,11 @@ CONFIG_ATH79_MACH_EW_DORIN=y
CONFIG_ATH79_MACH_HORNET_UB=y
CONFIG_ATH79_MACH_JA76PF=y
CONFIG_ATH79_MACH_JWAP003=y
+CONFIG_ATH79_MACH_MR600=y
CONFIG_ATH79_MACH_MZK_W04NU=y
CONFIG_ATH79_MACH_MZK_W300NH=y
CONFIG_ATH79_MACH_NBG460N=y
CONFIG_ATH79_MACH_OM2P=y
-CONFIG_ATH79_MACH_MR600=y
CONFIG_ATH79_MACH_PB42=y
CONFIG_ATH79_MACH_PB44=y
CONFIG_ATH79_MACH_PB92=y
@@ -214,6 +214,7 @@ CONFIG_SOC_AR724X=y
CONFIG_SOC_AR913X=y
CONFIG_SOC_AR933X=y
CONFIG_SOC_AR934X=y
+CONFIG_SOC_QCA953X=y
CONFIG_SOC_QCA955X=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 5a0b950..1a9b0df 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -195,6 +195,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
+ case ATH79_SOC_QCA9533:
mdio_dev = &ath79_mdio1_device;
mdio_data = &ath79_mdio1_data;
break;
@@ -250,6 +251,11 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
}
mdio_data->is_ar934x = 1;
break;
+
+ case ATH79_SOC_QCA9533:
+ mdio_data->builtin_switch = 1;
+ break;
+
case ATH79_SOC_QCA9558:
if (id == 1)
mdio_data->builtin_switch = 1;
@@ -540,6 +546,7 @@ static void __init ath79_init_eth_pll_data(unsigned int id)
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
+ case ATH79_SOC_QCA9533:
case ATH79_SOC_QCA9558:
pll_10 = AR934X_PLL_VAL_10;
pll_100 = AR934X_PLL_VAL_100;
@@ -596,6 +603,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
+ case ATH79_SOC_QCA9533:
pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
break;
@@ -645,6 +653,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
+ case ATH79_SOC_QCA9533:
pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII;
break;
@@ -882,6 +891,37 @@ void __init ath79_register_eth(unsigned int id)
pdata->fifo_cfg3 = 0x01f00140;
break;
+ case ATH79_SOC_QCA9533:
+ if (id == 0) {
+ pdata->reset_bit = AR933X_RESET_GE0_MAC |
+ AR933X_RESET_GE0_MDIO;
+ pdata->set_speed = ath79_set_speed_dummy;
+
+ pdata->phy_mask = BIT(4);
+ } else {
+ pdata->reset_bit = AR933X_RESET_GE1_MAC |
+ AR933X_RESET_GE1_MDIO;
+ pdata->set_speed = ath79_set_speed_dummy;
+
+ pdata->speed = SPEED_1000;
+ pdata->duplex = DUPLEX_FULL;
+ pdata->switch_data = &ath79_switch_data;
+
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ }
+
+ pdata->ddr_flush = ath79_ddr_no_flush;
+ pdata->has_gbit = 1;
+ pdata->is_ar724x = 1;
+
+ if (!pdata->fifo_cfg1)
+ pdata->fifo_cfg1 = 0x0010ffff;
+ if (!pdata->fifo_cfg2)
+ pdata->fifo_cfg2 = 0x015500aa;
+ if (!pdata->fifo_cfg3)
+ pdata->fifo_cfg3 = 0x01f00140;
+ break;
+
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
@@ -953,6 +993,7 @@ void __init ath79_register_eth(unsigned int id)
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
+ case ATH79_SOC_QCA9533:
pdata->mii_bus_dev = &ath79_mdio1_device.dev;
break;
diff --git a/target/linux/ar71xx/patches-3.3/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.3/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
new file mode 100644
index 0000000..4c9e761
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.3/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -0,0 +1,417 @@
+From 5300a7cd7ed2f88488ddba62947b9c6bb9663777 Mon Sep 17 00:00:00 2001
+Message-Id: <5300a7cd7ed2f88488ddba62947b9c6bb9663777.1396122227.git.mschiffer@universe-factory.net>
+From: Matthias Schiffer <mschiffer@universe-factory.net>
+Date: Sat, 29 Mar 2014 20:26:08 +0100
+Subject: [PATCH 1/2] MIPS: ath79: add support for QCA953x SoC
+
+Note that the clock calculation looks very similar to the QCA955x, but actually
+some bits' meanings are slightly different.
+---
+ arch/mips/ath79/Kconfig | 6 +-
+ arch/mips/ath79/clock.c | 78 ++++++++++++++++++++++++++
+ arch/mips/ath79/common.c | 4 ++
+ arch/mips/ath79/dev-common.c | 1 +
+ arch/mips/ath79/dev-wmac.c | 20 +++++++
+ arch/mips/ath79/early_printk.c | 1 +
+ arch/mips/ath79/gpio.c | 4 +-
+ arch/mips/ath79/irq.c | 4 ++
+ arch/mips/ath79/setup.c | 8 ++-
+ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 48 ++++++++++++++++
+ arch/mips/include/asm/mach-ath79/ath79.h | 11 ++++
+ 11 files changed, 182 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -688,6 +688,10 @@ config SOC_AR934X
+ select PCI_AR724X if PCI
+ def_bool n
+
++config SOC_QCA953X
++ select USB_ARCH_HAS_EHCI
++ def_bool n
++
+ config SOC_QCA955X
+ select USB_ARCH_HAS_EHCI
+ select HW_HAS_PCI
+@@ -731,7 +735,7 @@ config ATH79_DEV_USB
+ def_bool n
+
+ config ATH79_DEV_WMAC
+- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
++ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X)
+ def_bool n
+
+ config ATH79_NVRAM
+--- a/arch/mips/ath79/clock.c
++++ b/arch/mips/ath79/clock.c
+@@ -295,6 +295,82 @@ static void __init ar934x_clocks_init(vo
+ iounmap(dpll_base);
+ }
+
++static void __init qca953x_clocks_init(void)
++{
++ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
++ u32 cpu_pll, ddr_pll;
++ u32 bootstrap;
++
++ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP);
++ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40)
++ ath79_ref_clk.rate = 40 * 1000 * 1000;
++ else
++ ath79_ref_clk.rate = 25 * 1000 * 1000;
++
++ pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG);
++ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
++ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK;
++ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
++ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK;
++ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) &
++ QCA953X_PLL_CPU_CONFIG_NINT_MASK;
++ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
++ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK;
++
++ cpu_pll = nint * ath79_ref_clk.rate / ref_div;
++ cpu_pll += frac * (ath79_ref_clk.rate >> 6) / ref_div;
++ cpu_pll /= (1 << out_div);
++
++ pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG);
++ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
++ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK;
++ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
++ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK;
++ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) &
++ QCA953X_PLL_DDR_CONFIG_NINT_MASK;
++ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
++ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK;
++
++ ddr_pll = nint * ath79_ref_clk.rate / ref_div;
++ ddr_pll += frac * (ath79_ref_clk.rate >> 6) / (ref_div << 4);
++ ddr_pll /= (1 << out_div);
++
++ clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG);
++
++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
++ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
++
++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS)
++ ath79_cpu_clk.rate = ath79_ref_clk.rate;
++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL)
++ ath79_cpu_clk.rate = cpu_pll / (postdiv + 1);
++ else
++ ath79_cpu_clk.rate = ddr_pll / (postdiv + 1);
++
++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &
++ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK;
++
++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS)
++ ath79_ddr_clk.rate = ath79_ref_clk.rate;
++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL)
++ ath79_ddr_clk.rate = ddr_pll / (postdiv + 1);
++ else
++ ath79_ddr_clk.rate = cpu_pll / (postdiv + 1);
++
++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &
++ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK;
++
++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS)
++ ath79_ahb_clk.rate = ath79_ref_clk.rate;
++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL)
++ ath79_ahb_clk.rate = ddr_pll / (postdiv + 1);
++ else
++ ath79_ahb_clk.rate = cpu_pll / (postdiv + 1);
++
++ ath79_wdt_clk.rate = ath79_ref_clk.rate;
++ ath79_uart_clk.rate = ath79_ref_clk.rate;
++}
++
+ static void __init qca955x_clocks_init(void)
+ {
+ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
+@@ -383,6 +459,8 @@ void __init ath79_clocks_init(void)
+ ar933x_clocks_init();
+ else if (soc_is_ar934x())
+ ar934x_clocks_init();
++ else if (soc_is_qca953x())
++ qca953x_clocks_init();
+ else if (soc_is_qca955x())
+ qca955x_clocks_init();
+ else
+--- a/arch/mips/ath79/common.c
++++ b/arch/mips/ath79/common.c
+@@ -74,6 +74,8 @@ void ath79_device_reset_set(u32 mask)
+ else if (soc_is_ar934x() ||
+ soc_is_qca955x())
+ reg = AR934X_RESET_REG_RESET_MODULE;
++ else if (soc_is_qca953x())
++ reg = QCA953X_RESET_REG_RESET_MODULE;
+ else
+ BUG();
+
+@@ -101,6 +103,8 @@ void ath79_device_reset_clear(u32 mask)
+ else if (soc_is_ar934x() ||
+ soc_is_qca955x())
+ reg = AR934X_RESET_REG_RESET_MODULE;
++ else if (soc_is_qca953x())
++ reg = QCA953X_RESET_REG_RESET_MODULE;
+ else
+ BUG();
+
+--- a/arch/mips/ath79/dev-common.c
++++ b/arch/mips/ath79/dev-common.c
+@@ -100,6 +100,7 @@ void __init ath79_register_uart(void)
+ soc_is_ar724x() ||
+ soc_is_ar913x() ||
+ soc_is_ar934x() ||
++ soc_is_qca953x() ||
+ soc_is_qca955x()) {
+ ath79_uart_data[0].uartclk = clk_get_rate(clk);
+ platform_device_register(&ath79_uart_device);
+--- a/arch/mips/ath79/dev-wmac.c
++++ b/arch/mips/ath79/dev-wmac.c
+@@ -99,7 +99,7 @@ static int ar933x_wmac_reset(void)
+ return -ETIMEDOUT;
+ }
+
+-static int ar933x_r1_get_wmac_revision(void)
++static int ar93xx_get_soc_revision(void)
+ {
+ return ath79_soc_rev;
+ }
+@@ -124,7 +124,7 @@ static void __init ar933x_wmac_setup(voi
+ ath79_wmac_data.is_clk_25mhz = true;
+
+ if (ath79_soc_rev == 1)
+- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision;
++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision;
+
+ ath79_wmac_data.external_reset = ar933x_wmac_reset;
+ }
+@@ -147,6 +147,26 @@ static void ar934x_wmac_setup(void)
+ ath79_wmac_data.is_clk_25mhz = true;
+ }
+
++static void qca953x_wmac_setup(void)
++{
++ u32 t;
++
++ ath79_wmac_device.name = "qca953x_wmac";
++
++ ath79_wmac_resources[0].start = QCA953X_WMAC_BASE;
++ ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1;
++ ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
++ ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
++
++ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP);
++ if (t & QCA953X_BOOTSTRAP_REF_CLK_40)
++ ath79_wmac_data.is_clk_25mhz = false;
++ else
++ ath79_wmac_data.is_clk_25mhz = true;
++
++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision;
++}
++
+ static void qca955x_wmac_setup(void)
+ {
+ u32 t;
+@@ -314,6 +334,8 @@ void __init ath79_register_wmac(u8 *cal_
+ ar933x_wmac_setup();
+ else if (soc_is_ar934x())
+ ar934x_wmac_setup();
++ else if (soc_is_qca953x())
++ qca953x_wmac_setup();
+ else if (soc_is_qca955x())
+ qca955x_wmac_setup();
+ else
+--- a/arch/mips/ath79/early_printk.c
++++ b/arch/mips/ath79/early_printk.c
+@@ -114,6 +114,7 @@ static void prom_putchar_init(void)
+ case REV_ID_MAJOR_AR9341:
+ case REV_ID_MAJOR_AR9342:
+ case REV_ID_MAJOR_AR9344:
++ case REV_ID_MAJOR_QCA9533:
+ case REV_ID_MAJOR_QCA9558:
+ _prom_putchar = prom_putchar_ar71xx;
+ break;
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -240,6 +240,8 @@ void __init ath79_gpio_init(void)
+ ath79_gpio_count = AR933X_GPIO_COUNT;
+ else if (soc_is_ar934x())
+ ath79_gpio_count = AR934X_GPIO_COUNT;
++ else if (soc_is_qca953x())
++ ath79_gpio_count = QCA953X_GPIO_COUNT;
+ else if (soc_is_qca955x())
+ ath79_gpio_count = QCA955X_GPIO_COUNT;
+ else
+@@ -247,7 +249,7 @@ void __init ath79_gpio_init(void)
+
+ ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
+ ath79_gpio_chip.ngpio = ath79_gpio_count;
+- if (soc_is_ar934x() || soc_is_qca955x()) {
++ if (soc_is_ar934x() || soc_is_qca953x() || soc_is_qca955x()) {
+ ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
+ ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
+ }
+--- a/arch/mips/ath79/irq.c
++++ b/arch/mips/ath79/irq.c
+@@ -106,6 +106,7 @@ static void __init ath79_misc_irq_init(v
+ else if (soc_is_ar724x() ||
+ soc_is_ar933x() ||
+ soc_is_ar934x() ||
++ soc_is_qca953x() ||
+ soc_is_qca955x())
+ ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
+ else
+@@ -352,6 +353,9 @@ void __init arch_init_irq(void)
+ } else if (soc_is_ar934x()) {
+ ath79_ip2_handler = ath79_default_ip2_handler;
+ ath79_ip3_handler = ar934x_ip3_handler;
++ } else if (soc_is_qca953x()) {
++ ath79_ip2_handler = ath79_default_ip2_handler;
++ ath79_ip3_handler = ath79_default_ip3_handler;
+ } else if (soc_is_qca955x()) {
+ ath79_ip2_handler = ath79_default_ip2_handler;
+ ath79_ip3_handler = ath79_default_ip3_handler;
+--- a/arch/mips/ath79/setup.c
++++ b/arch/mips/ath79/setup.c
+@@ -164,6 +164,12 @@ static void __init ath79_detect_sys_type
+ rev = id & AR934X_REV_ID_REVISION_MASK;
+ break;
+
++ case REV_ID_MAJOR_QCA9533:
++ ath79_soc = ATH79_SOC_QCA9533;
++ chip = "9533";
++ rev = id & AR944X_REV_ID_REVISION_MASK;
++ break;
++
+ case REV_ID_MAJOR_QCA9558:
+ ath79_soc = ATH79_SOC_QCA9558;
+ chip = "9558";
+@@ -176,7 +182,7 @@ static void __init ath79_detect_sys_type
+
+ ath79_soc_rev = rev;
+
+- if (soc_is_qca955x())
++ if (soc_is_qca953x() || soc_is_qca955x())
+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
+ chip, rev);
+ else
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -106,6 +106,9 @@
+ #define AR934X_NFC_BASE 0x1b000200
+ #define AR934X_NFC_SIZE 0xb8
+
++#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
++#define QCA953X_WMAC_SIZE 0x20000
++
+ #define QCA955X_PCI_MEM_BASE0 0x10000000
+ #define QCA955X_PCI_MEM_BASE1 0x12000000
+ #define QCA955X_PCI_MEM_SIZE 0x02000000
+@@ -280,6 +283,43 @@
+
+ #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6)
+
++#define QCA953X_PLL_CPU_CONFIG_REG 0x00
++#define QCA953X_PLL_DDR_CONFIG_REG 0x04
++#define QCA953X_PLL_CLK_CTRL_REG 0x08
++#define QCA953X_PLL_ETH_XMII_CONTROL_REG 0x2c
++#define QCA953X_PLL_ETH_SGMII_CONTROL_REG 0x48
++
++#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
++#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
++#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6
++#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f
++#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12
++#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19
++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3
++
++#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0
++#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff
++#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10
++#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f
++#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16
++#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f
++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23
++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7
++
++#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2)
++#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3)
++#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4)
++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5
++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f
++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10
++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f
++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15
++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f
++#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20)
++#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21)
++#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
++
+ #define QCA955X_PLL_CPU_CONFIG_REG 0x00
+ #define QCA955X_PLL_DDR_CONFIG_REG 0x04
+ #define QCA955X_PLL_CLK_CTRL_REG 0x08
+@@ -354,6 +394,10 @@
+ #define AR934X_RESET_REG_BOOTSTRAP 0xb0
+ #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
+
++#define QCA953X_RESET_REG_RESET_MODULE 0x1c
++#define QCA953X_RESET_REG_BOOTSTRAP 0xb0
++#define QCA953X_RESET_REG_EXT_INT_STATUS 0xac
++
+ #define QCA955X_RESET_REG_BOOTSTRAP 0xb0
+ #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac
+
+@@ -468,6 +512,8 @@
+ #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1)
+ #define AR934X_BOOTSTRAP_DDR1 BIT(0)
+
++#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4)
++
+ #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4)
+
+ #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0)
+@@ -530,6 +576,7 @@
+ #define REV_ID_MAJOR_AR9341 0x0120
+ #define REV_ID_MAJOR_AR9342 0x1120
+ #define REV_ID_MAJOR_AR9344 0x2120
++#define REV_ID_MAJOR_QCA9533 0x0140
+ #define REV_ID_MAJOR_QCA9558 0x1130
+
+ #define AR71XX_REV_ID_MINOR_MASK 0x3
+@@ -603,6 +650,7 @@
+ #define AR913X_GPIO_COUNT 22
+ #define AR933X_GPIO_COUNT 30
+ #define AR934X_GPIO_COUNT 23
++#define QCA953X_GPIO_COUNT 24 /* (?) */
+ #define QCA955X_GPIO_COUNT 24
+
+ /*
+--- a/arch/mips/include/asm/mach-ath79/ath79.h
++++ b/arch/mips/include/asm/mach-ath79/ath79.h
+@@ -32,6 +32,7 @@ enum ath79_soc_type {
+ ATH79_SOC_AR9341,
+ ATH79_SOC_AR9342,
+ ATH79_SOC_AR9344,
++ ATH79_SOC_QCA9533,
+ ATH79_SOC_QCA9558,
+ };
+
+@@ -99,6 +100,16 @@ static inline int soc_is_ar934x(void)
+ return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
+ }
+
++static inline int soc_is_qca9533(void)
++{
++ return ath79_soc == ATH79_SOC_QCA9533;
++}
++
++static inline int soc_is_qca953x(void)
++{
++ return soc_is_qca9533();
++}
++
+ static inline int soc_is_qca9558(void)
+ {
+ return ath79_soc == ATH79_SOC_QCA9558;
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sat, 29 Mar 2014 21:12:15 +0100
Subject: ar71xx: add support for the TP-LINK TL-WR841N/ND v9
diff --git a/target/linux/ar71xx/base-files/etc/diag.sh b/target/linux/ar71xx/base-files/etc/diag.sh
index b206438..0bf2dd1 100755
--- a/target/linux/ar71xx/base-files/etc/diag.sh
+++ b/target/linux/ar71xx/base-files/etc/diag.sh
@@ -144,6 +144,9 @@ get_status_led() {
tl-wr703n)
status_led="tp-link:blue:system"
;;
+ tl-wr841n-v9)
+ status_led="tp-link:green:qss"
+ ;;
tl-wr2543n)
status_led="tp-link:green:wps"
;;
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/leds b/target/linux/ar71xx/base-files/etc/uci-defaults/leds
index 48b8154..43bc24d 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/leds
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/leds
@@ -163,6 +163,15 @@ tl-wr841n-v8)
ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
;;
+tl-wr841n-v9)
+ ucidef_set_led_netdev "wan" "WAN" "tp-link:green:wan" "eth1"
+ ucidef_set_led_switch "lan1" "LAN1" "tp-link:green:lan1" "switch0" "0x10"
+ ucidef_set_led_switch "lan2" "LAN2" "tp-link:green:lan2" "switch0" "0x08"
+ ucidef_set_led_switch "lan3" "LAN3" "tp-link:green:lan3" "switch0" "0x04"
+ ucidef_set_led_switch "lan4" "LAN4" "tp-link:green:lan4" "switch0" "0x02"
+ ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
+ ;;
+
tl-wr941nd | \
tl-wr1041n-v2)
ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/network b/target/linux/ar71xx/base-files/etc/uci-defaults/network
index a36036f..a1dfda0 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/network
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/network
@@ -192,6 +192,7 @@ tl-wdr3500 |\
tl-wr741nd |\
tl-wr741nd-v4 |\
tl-wr841n-v7 |\
+tl-wr841n-v9 |\
whr-g301n |\
whr-hp-g300n |\
whr-hp-gn |\
diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh
index 8d71352..ca174da 100755
--- a/target/linux/ar71xx/base-files/lib/ar71xx.sh
+++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh
@@ -381,6 +381,9 @@ ar71xx_board_detect() {
*"TL-WR841N/ND v8")
name="tl-wr841n-v8"
;;
+ *"TL-WR841N/ND v9")
+ name="tl-wr841n-v9"
+ ;;
*TL-WR941ND)
name="tl-wr941nd"
;;
diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
index e52ad9e..7168b4e 100755
--- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
@@ -163,6 +163,7 @@ platform_check_image() {
tl-wr841n-v1 | \
tl-wr841n-v7 | \
tl-wr841n-v8 | \
+ tl-wr841n-v9 | \
tl-wr941nd | \
tl-wr1041n-v2 | \
tl-wr1043nd | \
diff --git a/target/linux/ar71xx/config-3.3 b/target/linux/ar71xx/config-3.3
index 1c3ba3c..82d4d21 100644
--- a/target/linux/ar71xx/config-3.3
+++ b/target/linux/ar71xx/config-3.3
@@ -70,6 +70,7 @@ CONFIG_ATH79_MACH_TL_WR741ND=y
CONFIG_ATH79_MACH_TL_WR741ND_V4=y
CONFIG_ATH79_MACH_TL_WR841N_V1=y
CONFIG_ATH79_MACH_TL_WR841N_V8=y
+CONFIG_ATH79_MACH_TL_WR841N_V9=y
CONFIG_ATH79_MACH_TL_WR941ND=y
CONFIG_ATH79_MACH_UBNT=y
CONFIG_ATH79_MACH_UBNT_XM=y
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
new file mode 100644
index 0000000..c28afc6
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
@@ -0,0 +1,138 @@
+/*
+ * TP-LINK TL-WR841N/ND v9
+ *
+ * Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define TL_WR841NV9_GPIO_LED_WLAN 13
+#define TL_WR841NV9_GPIO_LED_QSS 3
+#define TL_WR841NV9_GPIO_LED_WAN 4
+#define TL_WR841NV9_GPIO_LED_LAN1 16
+#define TL_WR841NV9_GPIO_LED_LAN2 15
+#define TL_WR841NV9_GPIO_LED_LAN3 14
+#define TL_WR841NV9_GPIO_LED_LAN4 11
+
+#define TL_WR841NV9_GPIO_BTN_RESET 12
+#define TL_WR841NV9_GPIO_BTN_WIFI 17
+
+#define TL_WR841NV9_KEYS_POLL_INTERVAL 20 /* msecs */
+#define TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV9_KEYS_POLL_INTERVAL)
+
+static const char *tl_wr841n_v9_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data tl_wr841n_v9_flash_data = {
+ .part_probes = tl_wr841n_v9_part_probes,
+};
+
+static struct gpio_led tl_wr841n_v9_leds_gpio[] __initdata = {
+ {
+ .name = "tp-link:green:lan1",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN1,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan2",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN2,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan3",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN3,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan4",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN4,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:qss",
+ .gpio = TL_WR841NV9_GPIO_LED_QSS,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:wan",
+ .gpio = TL_WR841NV9_GPIO_LED_WAN,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:wlan",
+ .gpio = TL_WR841NV9_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button tl_wr841n_v9_gpio_keys[] __initdata = {
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = TL_WR841NV9_GPIO_BTN_RESET,
+ .active_low = 1,
+ }, {
+ .desc = "WIFI button",
+ .type = EV_KEY,
+ .code = KEY_RFKILL,
+ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = TL_WR841NV9_GPIO_BTN_WIFI,
+ .active_low = 1,
+ }
+};
+
+
+static void __init tl_ap143_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+ u8 tmpmac[ETH_ALEN];
+
+ ath79_register_m25p80(&tl_wr841n_v9_flash_data);
+
+ ath79_setup_ar933x_phy4_switch(false, false);
+
+ ath79_register_mdio(0, 0x0);
+
+ /* LAN */
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+ ath79_register_eth(1);
+
+ /* WAN */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+ ath79_register_eth(0);
+
+ ath79_init_mac(tmpmac, mac, 0);
+ ath79_register_wmac(ee, tmpmac);
+}
+
+static void __init tl_wr841n_v9_setup(void)
+{
+ tl_ap143_setup();
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v9_leds_gpio),
+ tl_wr841n_v9_leds_gpio);
+
+ ath79_register_gpio_keys_polled(1, TL_WR841NV9_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(tl_wr841n_v9_gpio_keys),
+ tl_wr841n_v9_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V9, "TL-WR841N-v9", "TP-LINK TL-WR841N/ND v9",
+ tl_wr841n_v9_setup);
diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile
index 01d1e67..c270f73 100644
--- a/target/linux/ar71xx/image/Makefile
+++ b/target/linux/ar71xx/image/Makefile
@@ -879,6 +879,7 @@ $(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR703,tl-wr703n-v1,TL-WR7
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR740NV4,tl-wr740n-v4,TL-WR741ND-v4,ttyATH0,115200,0x07400004,1,4Mlzma))
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR741NV4,tl-wr741nd-v4,TL-WR741ND-v4,ttyATH0,115200,0x07410004,1,4Mlzma))
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR841NV8,tl-wr841n-v8,TL-WR841N-v8,ttyS0,115200,0x08410008,1,4Mlzma))
+$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR841NV9,tl-wr841n-v9,TL-WR841N-v9,ttyS0,115200,0x08410009,1,4Mlzma))
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR1041,tl-wr1041n-v2,TL-WR1041N-v2,ttyS0,115200,0x10410002,1,4Mlzma))
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWR2543,tl-wr2543-v1,TL-WR2543N,ttyS0,115200,0x25430001,1,8Mlzma,-v 3.13.99))
$(eval $(call SingleProfile,TPLINK-LZMA,$(fs_64kraw),TLWDR3500V1,tl-wdr3500-v1,TL-WDR3500,ttyS0,115200,0x35000001,1,8Mlzma))
@@ -924,7 +925,7 @@ $(eval $(call MultiProfile,TLWA901,TLWA901NV1 TLWA901NV2))
$(eval $(call MultiProfile,TLWA7510,TLWA7510NV1))
$(eval $(call MultiProfile,TLWR740,TLWR740NV1 TLWR740NV3 TLWR740NV4))
$(eval $(call MultiProfile,TLWR741,TLWR741NV1 TLWR741NV2 TLWR741NV4))
-$(eval $(call MultiProfile,TLWR841,TLWR841NV15 TLWR841NV3 TLWR841NV5 TLWR841NV7 TLWR841NV8))
+$(eval $(call MultiProfile,TLWR841,TLWR841NV15 TLWR841NV3 TLWR841NV5 TLWR841NV7 TLWR841NV8 TLWR841NV9))
$(eval $(call MultiProfile,TLWR941,TLWR941NV2 TLWR941NV3 TLWR941NV4))
$(eval $(call MultiProfile,TLWDR4300,TLWDR3500V1 TLWDR3600V1 TLWDR4300V1 TLWDR4310V1))
$(eval $(call MultiProfile,UBNT,UBNTAIRROUTER UBNTRS UBNTRSPRO UBNTLSSR71 UBNTBULLETM UBNTROCKETM UBNTNANOM UBNTUNIFI UBNTUNIFIOUTDOOR))
diff --git a/target/linux/ar71xx/patches-3.3/708-MIPS-ath79-TL-WR841v9-support.patch b/target/linux/ar71xx/patches-3.3/708-MIPS-ath79-TL-WR841v9-support.patch
new file mode 100644
index 0000000..37425a6
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.3/708-MIPS-ath79-TL-WR841v9-support.patch
@@ -0,0 +1,38 @@
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -547,6 +547,15 @@ config ATH79_MACH_TL_WR841N_V8
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
++config ATH79_MACH_TL_WR841N_V9
++ bool "TP-LINK TL-WR841N/ND v9 support"
++ select SOC_QCA953X
++ select ATH79_DEV_ETH
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_M25P80
++ select ATH79_DEV_WMAC
++
+ config ATH79_MACH_TL_WR941ND
+ bool "TP-LINK TL-WR941ND support"
+ select SOC_AR913X
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -85,6 +85,7 @@ obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += m
+ obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR841N_V8) += mach-tl-wr841n-v8.o
++obj-$(CONFIG_ATH79_MACH_TL_WR841N_V9) += mach-tl-wr841n-v9.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2) += mach-tl-wr1041n-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -90,6 +90,7 @@ enum ath79_mach_type {
+ ATH79_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */
+ ATH79_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */
+ ATH79_MACH_TL_WR841N_V8, /* TP-LINK TL-WR841N/ND v8 */
++ ATH79_MACH_TL_WR841N_V9, /* TP-LINK TL-WR841N/ND v9 */
+ ATH79_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */
+ ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */
+ ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */
From: nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 7 Oct 2012 23:01:52 +0000
Subject: x86: add grub2 iso support
diff --git a/Config.in b/Config.in
index 5b4522e..54df7c8 100644
--- a/Config.in
+++ b/Config.in
@@ -81,7 +81,7 @@ menu "Target Images"
config TARGET_ROOTFS_ISO
bool "iso"
default n
- depends TARGET_ROOTFS_INITRAMFS && TARGET_x86
+ depends on TARGET_x86_generic
help
Create some bootable ISO image
diff --git a/target/linux/x86/base-files/lib/preinit/20_check_iso b/target/linux/x86/base-files/lib/preinit/20_check_iso
new file mode 100644
index 0000000..beff6eb
--- /dev/null
+++ b/target/linux/x86/base-files/lib/preinit/20_check_iso
@@ -0,0 +1,5 @@
+check_for_iso() {
+ grep -qE '/dev/root.*iso9660' /proc/mounts && ramoverlay
+}
+
+boot_hook_add preinit_mount_root check_for_iso
diff --git a/target/linux/x86/image/Makefile b/target/linux/x86/image/Makefile
index 13da511..8f0debd 100644
--- a/target/linux/x86/image/Makefile
+++ b/target/linux/x86/image/Makefile
@@ -9,7 +9,8 @@ include $(INCLUDE_DIR)/image.mk
export PATH=$(TARGET_PATH):/sbin
-GRUB2_MODULES = biosdisk boot chain configfile ext2 linux ls part_msdos reboot serial vga
+GRUB2_MODULES = at_keyboard biosdisk boot chain configfile ext2 linux ls part_msdos reboot serial vga
+GRUB2_MODULES_ISO = at_keyboard biosdisk boot chain configfile iso9660 linux ls part_msdos reboot serial vga
GRUB_TERMINALS =
GRUB_SERIAL_CONFIG =
GRUB_TERMINAL_CONFIG =
@@ -51,7 +52,7 @@ ifneq ($(CONFIG_X86_GRUB_IMAGES),)
define Image/cmdline/ext4
root=$(ROOTPART) rootfstype=ext4 rootwait
endef
-
+
define Image/cmdline/jffs2-64k
block2mtd.block2mtd=$(ROOTPART),65536,rootfs root=/dev/mtdblock0 rootfstype=jffs2 rootwait
endef
@@ -165,7 +166,31 @@ define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
endef
-define Image/Build/iso
+ifdef CONFIG_X86_USE_GRUB2
+ define Image/Build/iso
+ $(INSTALL_DIR) $(KDIR)/root.grub/boot/grub $(KDIR)/grub2
+ $(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz
+ grub-mkimage \
+ -o $(KDIR)/grub2/eltorito.img \
+ -O i386-pc \
+ -c ./grub-early.cfg \
+ $(GRUB2_MODULES_ISO)
+ cat \
+ $(STAGING_DIR_HOST)/lib/grub/i386-pc/cdboot.img \
+ $(KDIR)/grub2/eltorito.img \
+ > $(KDIR)/root.grub/boot/grub/eltorito.img
+ sed \
+ -e 's#@SERIAL_CONFIG@#$(strip $(GRUB_SERIAL_CONFIG))#g' \
+ -e 's#@TERMINAL_CONFIG@#$(strip $(GRUB_TERMINAL_CONFIG))#g' \
+ -e 's#@CMDLINE@#root=/dev/sr0 rootfstype=iso9660 rootwait $(strip $(call Image/cmdline/$(1)) $(BOOTOPTS) $(GRUB_CONSOLE_CMDLINE))#g' \
+ -e 's#@TIMEOUT@#$(GRUB_TIMEOUT)#g' \
+ ./grub-iso.cfg > $(KDIR)/root.grub/boot/grub/grub.cfg
+ $(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz
+ mkisofs -R -b boot/grub/eltorito.img -no-emul-boot -boot-info-table \
+ -o $(KDIR)/root.iso $(KDIR)/root.grub $(TARGET_DIR)
+ endef
+else
+ define Image/Build/iso
$(INSTALL_DIR) $(KDIR)/root.grub/boot/grub
$(CP) \
$(KDIR)/stage2_eltorito \
@@ -179,7 +204,8 @@ define Image/Build/iso
$(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz
mkisofs -R -b boot/grub/stage2_eltorito -no-emul-boot -boot-load-size 4 -boot-info-table \
-o $(KDIR)/root.iso $(KDIR)/root.grub
-endef
+ endef
+endif
ifneq ($(CONFIG_X86_VDI_IMAGES),)
define Image/Build/vdi
diff --git a/target/linux/x86/image/grub-iso.cfg b/target/linux/x86/image/grub-iso.cfg
new file mode 100644
index 0000000..4d5d697
--- /dev/null
+++ b/target/linux/x86/image/grub-iso.cfg
@@ -0,0 +1,10 @@
+@SERIAL_CONFIG@
+@TERMINAL_CONFIG@
+
+set default="0"
+set timeout="@TIMEOUT@"
+set root='(cd)'
+
+menuentry "OpenWrt" {
+ linux /boot/vmlinuz @CMDLINE@ noinitrd reboot=bios
+}
From: jow <jow@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Thu, 17 Jan 2013 15:46:26 +0000
Subject: x86: explicitely pass staging directory to grub-mkimage instead of relying on build time defaults (#12821)
diff --git a/target/linux/x86/image/Makefile b/target/linux/x86/image/Makefile
index 8f0debd..6e2bd54 100644
--- a/target/linux/x86/image/Makefile
+++ b/target/linux/x86/image/Makefile
@@ -102,6 +102,7 @@ ifneq ($(CONFIG_X86_GRUB_IMAGES),)
$(INSTALL_DIR) $(KDIR)/root.grub/boot/grub $(KDIR)/grub2
$(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz
grub-mkimage \
+ -d $(STAGING_DIR_HOST)/lib/grub/i386-pc \
-o $(KDIR)/grub2/core.img \
-O i386-pc \
-c ./grub-early.cfg \
@@ -171,6 +172,7 @@ ifdef CONFIG_X86_USE_GRUB2
$(INSTALL_DIR) $(KDIR)/root.grub/boot/grub $(KDIR)/grub2
$(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz
grub-mkimage \
+ -d $(STAGING_DIR_HOST)/lib/grub/i386-pc \
-o $(KDIR)/grub2/eltorito.img \
-O i386-pc \
-c ./grub-early.cfg \
From: blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Tue, 7 May 2013 12:35:07 +0000
Subject: grub2: Add sub package grub-editenv for target installation
grub-editenv allows to modify grub2 environment files. Add a new package
that build grub2 for the target and packs up grub-editenv.
Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
diff --git a/package/grub2/Makefile b/package/grub2/Makefile
index b606f54..dd490ff 100644
--- a/package/grub2/Makefile
+++ b/package/grub2/Makefile
@@ -16,7 +16,6 @@ PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=@GNU/grub
PKG_MD5SUM:=e927540b6eda8b024fb0391eeaa4091c
-PKG_HOST_ONLY:=1
HOST_BUILD_PARALLEL:=1
PKG_BUILD_DEPENDS:=grub2/host
@@ -32,6 +31,23 @@ define Package/grub2
DEPENDS:=@TARGET_x86
endef
+define Package/grub2-editenv
+ CATEGORY:=Utilities
+ SECTION:=utils
+ TITLE:=Grub2 Environment editor
+ URL:=http://www.gnu.org/software/grub/
+ DEPENDS:=@TARGET_x86
+endef
+
+define Package/grub2-editenv/description
+ Edit grub2 environment files.
+endef
+
+CONFIGURE_ARGS += \
+ --target=$(REAL_GNU_TARGET_NAME) \
+ --disable-werror \
+ --disable-nls
+
HOST_CONFIGURE_ARGS += \
--target=$(REAL_GNU_TARGET_NAME) \
--sbindir="$(STAGING_DIR_HOST)/bin" \
@@ -47,5 +63,11 @@ define Host/Configure
$(Host/Configure/Default)
endef
+define Package/grub2-editenv/install
+ $(INSTALL_DIR) $(1)/usr/sbin
+ $(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/
+endef
+
$(eval $(call HostBuild))
$(eval $(call BuildPackage,grub2))
+$(eval $(call BuildPackage,grub2-editenv))
From: nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sat, 10 Aug 2013 18:35:29 +0000
Subject: x86: Fix CONFIG_X86_GRUB_SERIAL=""
With
.config:CONFIG_X86_GRUB_SERIAL=""
which (AFAICT) is the way to tell GRUB not to use a serial console, in
target/linux/x86/image/Makefile:ifneq ($(CONFIG_X86_GRUB_SERIAL),)
$(CONFIG_X86_GRUB_SERIAL) expands to `""' (a literal double double-quote),
making the condition unconditionally false.
This patch fixes the situation by passing CONFIG_X86_GRUB_SERIAL through
qstrip before testing.
Signed-off-by: Tamas TEVESZ <ice@extreme.hu>
diff --git a/target/linux/x86/image/Makefile b/target/linux/x86/image/Makefile
index 6e2bd54..2e73519 100644
--- a/target/linux/x86/image/Makefile
+++ b/target/linux/x86/image/Makefile
@@ -27,8 +27,10 @@ ifneq ($(strip $(foreach subtarget,$(USE_ATKBD),$(CONFIG_TARGET_x86_$(subtarget)
GRUB2_MODULES += at_keyboard
endif
-ifneq ($(CONFIG_X86_GRUB_SERIAL),)
- GRUB_CONSOLE_CMDLINE += console=$(call qstrip,$(CONFIG_X86_GRUB_SERIAL)),$(CONFIG_X86_GRUB_BAUDRATE)n8
+GRUB_SERIAL:=$(call qstrip,$(CONFIG_X86_GRUB_SERIAL))
+
+ifneq ($(GRUB_SERIAL),)
+ GRUB_CONSOLE_CMDLINE += console=$(GRUB_SERIAL),$(CONFIG_X86_GRUB_BAUDRATE)n8
GRUB_SERIAL_CONFIG := serial --unit=0 --speed=$(CONFIG_X86_GRUB_BAUDRATE) --word=8 --parity=no --stop=1
GRUB_TERMINALS += serial
endif
From: nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 30 Mar 2014 19:55:39 +0000
Subject: grub2: disable libdevmapper - fix build when it's available
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
diff --git a/package/grub2/Makefile b/package/grub2/Makefile
index 4edd92b..ed86fff 100644
--- a/package/grub2/Makefile
+++ b/package/grub2/Makefile
@@ -46,7 +46,8 @@ endef
CONFIGURE_ARGS += \
--target=$(REAL_GNU_TARGET_NAME) \
--disable-werror \
- --disable-nls
+ --disable-nls \
+ --disable-device-mapper
HOST_CONFIGURE_ARGS += \
--target=$(REAL_GNU_TARGET_NAME) \
From: nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Sun, 30 Mar 2014 19:55:43 +0000
Subject: grub2: disable mkfont - fix build on Archlinux
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
diff --git a/package/grub2/Makefile b/package/grub2/Makefile
index ed86fff..509fb60 100644
--- a/package/grub2/Makefile
+++ b/package/grub2/Makefile
@@ -47,7 +47,8 @@ CONFIGURE_ARGS += \
--target=$(REAL_GNU_TARGET_NAME) \
--disable-werror \
--disable-nls \
- --disable-device-mapper
+ --disable-device-mapper \
+ --disable-grub-mkfont
HOST_CONFIGURE_ARGS += \
--target=$(REAL_GNU_TARGET_NAME) \
This diff is collapsed.
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sat, 5 Jul 2014 22:30:34 +0200
Subject: iptables: avoid file conflicts due to unneeded libip6t_*.so in ip6tables package
diff --git a/package/iptables/Makefile b/package/iptables/Makefile
index e36a093..0c7a380 100644
--- a/package/iptables/Makefile
+++ b/package/iptables/Makefile
@@ -406,10 +406,6 @@ define Package/ip6tables/install
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/ip6tables $(1)/usr/sbin/
$(LN) ip6tables $(1)/usr/sbin/ip6tables-save
$(LN) ip6tables $(1)/usr/sbin/ip6tables-restore
- $(INSTALL_DIR) $(1)/usr/lib/iptables
- (cd $(PKG_INSTALL_DIR)/usr/lib/iptables ; \
- $(CP) libip6t_*.so $(1)/usr/lib/iptables/ \
- )
endef
define Package/libiptc/install
This diff is collapsed.
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Sat, 26 Jul 2014 17:03:40 +0200
Subject: Reduce fw3 log spam in netifd scripts
diff --git a/package/netifd/files/lib/netifd/dhcp.script b/package/netifd/files/lib/netifd/dhcp.script
index db3fc01..a7ce0d8 100755
--- a/package/netifd/files/lib/netifd/dhcp.script
+++ b/package/netifd/files/lib/netifd/dhcp.script
@@ -50,7 +50,7 @@ setup_interface () {
ip6rd="${ip6rd#* }"
local ip6rdbr="${ip6rd%% *}"
- [ -n "$ZONE" ] || ZONE=$(fw3 network $INTERFACE)
+ [ -n "$ZONE" ] || ZONE=$(fw3 network $INTERFACE 2>/dev/null)
[ -z "$IFACE6RD" -o "$IFACE6RD" = 1 ] && IFACE6RD=${INTERFACE}_6rd
json_init
diff --git a/package/odhcp6c/files/dhcpv6.script b/package/odhcp6c/files/dhcpv6.script
index 8c1ba18..146a966 100755
--- a/package/odhcp6c/files/dhcpv6.script
+++ b/package/odhcp6c/files/dhcpv6.script
@@ -97,7 +97,7 @@ setup_interface () {
MAPRULE="$LW4O6"
fi
- [ -n "$ZONE" ] || ZONE=$(fw3 network $INTERFACE)
+ [ -n "$ZONE" ] || ZONE=$(fw3 network $INTERFACE 2>/dev/null)
if [ "$IFACE_MAP" != 0 -a -n "$MAPTYPE" -a -n "$MAPRULE" ]; then
[ -z "$IFACE_MAP" -o "$IFACE_MAP" = 1 ] && IFACE_MAP=${INTERFACE}_map
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